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| (R) IRF640 IRF640FP N - CHANNEL 200V - 0.150 - 18A TO-220/TO-220FP MESH OVERLAYTM MOSFET TYPE IRF640 IRF640FP s s s s V DSS 200 V 200 V R DS(on) < 0.18 < 0.18 ID 18 A 18 A TYPICAL RDS(on) = 0.150 EXTREMELY HIGH dV/dt CAPABILITY VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED 3 1 2 1 2 3 DESCRIPTION This power MOSFET is designed using he company's consolidated strip layout-based MESH OVERLAYTM process. This technology matches and improves the performances compared with standard parts from various sources. TO-220 TO-220FP APPLICATIONS s HIGH CURRENT SWITCHING s UNINTERRUPTIBLE POWER SUPPLY (UPS) s DC/DC COVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT. INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR V GS ID ID I DM (*) P tot dv/dt(1) V ISO Ts tg Tj Parameter IRF640 Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k) G ate-source Voltage Drain Current (continuous) at Tc = 25 o C Drain Current (continuous) at Tc = 100 oC Drain Current (pulsed) T otal Dissipation at T c = 25 oC Derating Factor Peak Diode Recovery voltage slope Insulation Withstand Voltage (DC) Storage Temperature Max. Operating Junction Temperature 18 11 72 125 1.0 5 -65 to 150 150 200 200 20 18(**) 11(**) 72 40 0.32 5 2000 Value IRF 640F P V V V A A A W W/ C V/ns V o o o Un it C C (*) Pulse width limited by safe operating area ( 1) ISD 18A, di/dt 300 A/s, VDD V(BR)DSS, Tj TJMAX First Digit of the Datecode Being Z or K Identifies Silicon Characterized in this Datasheet (**) Limited only by Maximum Temperature Allowed October 1999 1/9 IRF640/FP THERMAL DATA TO-220 R thj -case R thj -amb R thc-sink Tl Thermal Resistance Junction-case Max 1.0 62.5 0.5 300 TO-220FP 3.12 o o o C/W C/W C/W o C Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose AVALANCHE CHARACTERISTICS Symbo l IAR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 o C, I D = IAR , VDD = 50 V) Max Valu e 18 280 Unit A mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 A V GS = 0 Min. 200 1 10 100 T yp. Max. Unit V A A nA V DS = Max Rating Zero G ate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) V GS = 20 V T c = 125 C o ON () Symbo l V GS(th) R DS(on) I D(o n) Parameter Gate Threshold Voltage V DS = V GS Test Con ditions ID = 250 A ID = 9 A 18 Min. 2 T yp. 3 0.15 Max. 4 0.18 Unit V A Static Drain-source O n V GS = 10V Resistance On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V DYNAMIC Symbo l g f s () C iss C os s C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse T ransfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 25 V f = 1 MHz ID = 9 A V GS = 0 Min. 7 T yp. 11 1200 200 60 1560 260 80 Max. Unit S pF pF pF 2/9 IRF640/FP ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l t d(on) tr Qg Q gs Q gd Parameter Turn-on Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 100 V ID = 9 A VGS = 10 V R G = 4.7 (see test circuit, figure 3) V DD = 160 V I D = 18 A V GS = 10V Min. T yp. 13 27 55 10 21 Max. 17 35 72 Unit ns ns nC nC nC SWITCHING OFF Symbo l tr (Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Con ditions V DD = 160 V ID = 18 A R G = 4.7 V GS = 10 V (see test circuit, figure 5) Min. T yp. 21 25 50 Max. 27 32 65 Unit ns ns ns SOURCE DRAIN DIODE Symbo l ISD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 18 A V GS = 0 240 1.8 15 I SD = 18 A di/dt = 100 A/s T j = 150 o C V DD = 50 V (see test circuit, figure 5) Test Con ditions Min. T yp. Max. 18 72 1.5 Unit A A V ns C A () Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area Safe Operating Area for TO-220 Safe Operating Area for TO-220FP 3/9 IRF640/FP Thermal Impedance for TO-220 Thermal Impedance for TO-220FP Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance 4/9 IRF640/FP Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 IRF640/FP Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 IRF640/FP TO-220 MECHANICAL DATA DIM. MIN. A C D D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. 13.0 2.65 15.25 6.2 3.5 3.75 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 14.0 2.95 15.75 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147 E mm TYP. MAX. 4.60 1.32 2.72 1.27 0.70 0.88 1.70 1.70 5.15 2.7 10.40 0.019 0.024 0.044 0.044 0.194 0.094 0.393 MIN. 0.173 0.048 0.094 4.40 1.23 2.40 inch TYP. MAX. 0.181 0.051 0.107 0.050 0.027 0.034 0.067 0.067 0.203 0.106 0.409 0.645 0.551 0.116 0.620 0.260 0.154 0.151 A C D1 L2 F1 D G1 Dia. F2 F L5 L7 L6 L9 L4 G H2 P011C 7/9 IRF640/FP TO-220FP MECHANICAL DATA DIM. MIN. A B D E F F1 F2 G G1 H L2 L3 L4 L6 L7 O 28.6 9.8 15.9 9 3 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 30.6 10.6 16.4 9.3 3.2 1.126 0.385 0.626 0.354 0.118 mm TYP. MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409 A B L3 L6 L7 F1 F D G1 E H F2 123 L2 L4 8/9 G IRF640/FP Information furnished is believed to be accurate and reliable. However, STMicroelect onics assumes no responsibil ity for the consequences r of use of such information nor for any infringement of patents or other rights of third partes which may result from its use. No license is i granted by implication or otherwise under any patent or patent rights of STMicroelectro nics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all informaton previously supplied. STMicroelectronics products i are not authorized for use as critical components in life support devices or systems with express written approval of STMicroelectronics. out The ST logo is a trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japa - Malaysia - Malta - Morocco n Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com . 9/9 |
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